First in a series of posts……
When discussing rapid development of complex embedded systems the issue of using third party hardware and software building blocks inevitably comes up. There are a lot of options and issues when it comes to using embedded system building blocks. Nobody wants to re-invent the wheel but picking the wrong wheel can overturn your chariot! In this series of posts we will look at some options and issues for speeding up hardware development using different building blocks. In a later series we will look at some of the software issues.
Semiconductor vendors offer an amazing range of System-On-Chip (SoC) devices. Choosing the right SoC can really shorten development time if most of what you need is already in the silicon. A critical area that is sometimes missed though is an analysis of how your system’s desired performance running your application compares to the SoC’s likely performance running your application in your system. What parts of an SoC you use and how your traffic flows affects performance. How your system is physically partitioned and how you interface the SoC to your system can also have dramatic effects on performance. The thermal environment in your system can impact how much performance you can squeeze out of an SoC.
If you develop an FPGA based SoC for your system you can use some pretty powerful low-cost vendor provided design tools and no charge (nothing is totally free my friend!) FPGA vendor cores. These cores can be a big time saver in chip design. The FPGA vendor has knowledge of its cores, tools, and silicon so they can help with development problems at a deeper level than a third party core vendor. Also, your interests and the FPGA vendor’s interests are aligned. They want you to get to market as fast as possible so they can make money too. Be aware FPGA vendor core licenses often specify you can only use them in the vendor’s chips. This can present problems if you want to port your design later. It’s best to study the license details and be up-front with the FPGA vendor on what you plan to do.
In our next post we will look at the use of hardware reference designs.