Customization and Complexity

In a world where the latest technology is available to everyone how do you differentiate your product? The answer is customization. Provide the features and performance that your customers need faster and at a better price than your competitors and you will win.  Customization is the promise of today’s FPGA technologies.

Hardware used to be fixed by the chips chosen for your circuit boards.  Changing the hardware was expensive and time consuming.  As chip technology advanced integration reduced the number of items on the circuit board from a microprocessor with peripherals on a board to a microprocessor plus some fixed peripherals on a chip.  Custom logic was implemented either in an ASIC or a companion FPGA chip.  Analog circuitry was often relegated to a separate circuit board.  Today we have high capacity FPGAs that can be configured to contain one or more microprocessors, your choice of peripherals, and custom logic for your application.  Not only are the numbers and types of peripherals customizable but the peripheral cores themselves can be modified  in some cases.  You can mix and match hard and soft  processors to meet your performance needs.  System designers today can also take advantage of chips  such as the SmartFusion line from Microsemi and the PSOC family from Cypress Semiconductor that contain a microprocessor, your choice of peripherals, custom logic, and your choice of analog circuitry.  The trend is clear– the number of items on the bill of materials is decreasing due to advances in semiconductor process technology.  This trend reduces product cost, simplifies manufacturing,  and reduces product size (real estate reduction) as well as inventory costs (less chips to stock).

So what’s the problem?  Things sound great, you can customize one or more of today’s chips to provide exactly what you need for your application and reduce costs.   The problem is complexity.  Assembling and configuring various blocks into a complete chip design opens a myriad of low level details such as bus protocols, bus widths, clocking issues, reset issues, software/firmware issues, interrupts, and timing constraints.  Some have dubbed this the blank slate problem.  Designing a system on a chip from scratch is not for the faint of heart.

Programmable logic vendors have invested huge amounts of money in making their tools easier to use with limited success.  The problem is a difficult one.  How do you make the customization capability accessible but keep the design process simple?  Customization and complexity are two sides of the same coin.  T.J. Rodgers from Cypress Semiconductor once described the process of creating his PSOC product family as “solving problems you didn’t know existed for people you haven’t met yet”.  Imagine the difficulty of creating the tools  to do that.  Finding bugs in an FPGA vendor’s tool is annoying but I try to remember the customization/complexity coin and take a moment to reflect on the big picture.  It helps.  We have the opportunity to create amazing custom technology today thanks to the efforts of these folks.